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Modeling and minimizing variations of gate-all-around multiple-channel nanowire TFTs
Po Chun Huang, Lu An Chen, C. C. Chen,
Jeng-Tzong Sheu
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此作品的通信作者
奈米科技碩博班
研究成果
:
Conference contribution
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同行評審
1
引文 斯高帕斯(Scopus)
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Keyphrases
Multi-channel
100%
Thin-film Transistors
100%
Nanowires
100%
Gate-all-around
100%
Poly-Si
50%
Electrical Characteristics
33%
Gate Structure
33%
Plasma Treatment
33%
NH3 Plasma
33%
Superior Performance
16%
Electrical Performance
16%
Tri-gate
16%
Subthreshold Swing
16%
Threshold Voltage
16%
Device Performance
16%
Electrical Measurements
16%
Poisson
16%
Scattering Model
16%
Multiple Gate
16%
Voltage Swing
16%
Grain Size Distribution
16%
Device-to-device Variation
16%
Engineering
Thin-Film Transistor
100%
Nanowire
100%
Polysilicon
50%
Plasma Treatment
33%
Electrical Performance
16%
Device Performance
16%
Electrical Measurement
16%
Material Science
Nanowire
100%
Thin-Film Transistor
100%
Electrical Property
33%
Grain Size
16%
Chemical Engineering
Film
100%
Nanowire
100%
Polysilicon
50%