@inproceedings{09f20fa61354403b912f0b5ae4f43d80,
title = "mm-Wave CMOS Device Optimization Design for Super-400 GHz fMAX with Impact of Technology Scaling and Layout Dependent Effects",
abstract = "The impact of nano CMOS devices scaling and layout dependent effects (LDE) on high frequency performance has been investigated to identify the fT and fMAX optimization principles, aimed at super-400 GHz fMAX. A comprehensive comparison of high frequency parameters of nMOSFETs with gate length (Lg) scaling from 56-nm to 33-nm indicates fT boost up to 128% but only 1650% gain of fMAX. The major challenge comes from the dramatic increase of equivalent gate resistance Rg @ Y(ω) and output conductance gd(ω) over high frequencies due to a dramatic device scaling, which hinders the enhancement of f MAX to much smaller rate than that of fT. An aggressive fMAX boost aimed at super-400 GHz demands an effective reduction of the Rg @ Y and gds, through not only layouts optimization but also the innovations of device structures and materials.",
keywords = "fMAX, fT, gate resistance, layout, nano CMOS device, optimization, output conductance, scaling",
author = "Guo, {Jyh Chyurn} and Wijaya, {Adhi Cahyo} and Lin, {Jinq Min}",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 31st Asia-Pacific Microwave Conference, APMC 2023 ; Conference date: 05-12-2023 Through 08-12-2023",
year = "2023",
doi = "10.1109/APMC57107.2023.10439832",
language = "English",
series = "Asia-Pacific Microwave Conference Proceedings, APMC",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "246--249",
booktitle = "2023 Asia-Pacific Microwave Conference, APMC 2023",
address = "美國",
}