Mixed-voltage I/O buffer with dynamic gate-bias circuit to achieve 3×VDD input tolerance by using 1×VDD devices and single VDD supply

Ming-Dou Ker*, Shih Lun Chen

*此作品的通信作者

    研究成果: Conference article › 同行評審

    20 引文 斯高帕斯（Scopus）

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    Keyphrases

    Engineering

    Material Science