Millimeter-Wave single-pole-double-throw switch design with Stacked-FET topology using network cascading analysis

Ting Yi Tsai, Yi Fan Tsao, Heng Tung Hsu*

*此作品的通信作者

研究成果: Article同行評審

摘要

In this paper, the correlation between the key performance of the shunt-type single-pole-double-throw (SPDT) switch circuitry and the intrinsic device parameters is theoretically investigated by network cascading approach. Through rigorous analysis, we concluded that the intrinsic device parameters such as the gate-to-drain capacitance (Cgd) have direct impact on the performance due to the scaling of the gate length. The analysis results were verified by the implementation of an SPDT switch at millimeter-wave frequency using stacked-FET topology. An input power at 1-dB compression point (P1dB) of greater than 30 dBm was measured from 15 to 35 GHz, exhibiting an enhancement of 6-dB in comparison with the conventional topology.

原文English
文章編號154948
期刊AEU - International Journal of Electronics and Communications
172
DOIs
出版狀態Published - 12月 2023

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