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Memory-Centric Fusion-based CNN Accelerator with 3D-NoC and 3D-DRAM
Wei Lu, Pei Yu Ge,
Po Tsang Huang
,
Hung Ming Chen
, Wei Hwang
國際半導體產業學院
智慧半導體奈米系統技術研究中心
國立陽明交通大學
電機資訊國際學位學程
電子研究所
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Keyphrases
Data Access
100%
Memory-based
100%
Stacked DRAM
100%
CNN Accelerator
100%
3D Network-on-chip (3D NoC)
100%
Centric Fusion
100%
Network on chip
50%
Data Reuse
50%
Data Movement
50%
High Efficiency
25%
Energy Efficient
25%
Controller
25%
Energy Consumption
25%
Processing Element
25%
Memory Interface
25%
Critical Design
25%
System Efficiency
25%
Deep Neural Network
25%
Dynamic Voltage Frequency Scaling
25%
Resource Utilization
25%
Power Delay Product
25%
Large Memory
25%
3D Memory
25%
Computational Capacity
25%
Energy Cost
25%
Prefetching
25%
Memory Footprint
25%
Scalable Network
25%
DDR3
25%
Energy Access
25%
Conventional Network
25%
Vault
25%
3D-stacked Memory
25%
Computer Science
Networks on Chips
100%
Convolutional Neural Network
100%
Data Access
100%
Deep Neural Network
50%
Energy Efficient
25%
Energy Consumption
25%
Processing Element
25%
Memory Interface
25%
Critical Design
25%
System Efficiency
25%
Data Reuse
25%
Resource Utilisation
25%
Dynamic Voltage
25%
Prefetch
25%
Memory Footprint
25%
Energy Delay Product
25%
Managing Data
25%