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Machine Learning Assisted Circuit Sizing Approach for Low-Voltage Analog Circuits with Efficient Variation-Aware Optimization
Ling Yen Song, Chih Yun Chou, Tung Chieh Kuo,
Chien Nan Liu
,
Juinn Dar Huang
電機工程學系
電子研究所
研究成果
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Keyphrases
Machine Learning
100%
Variation-aware
100%
Circuit Sizing
100%
Low-voltage Analog Circuits
100%
Evolutionary Algorithms
66%
Process Variation Effect
66%
Evolutionary Optimization
66%
Popular
33%
Prediction Model
33%
Process Variation
33%
Low Voltage
33%
Process Optimization
33%
High Reliability
33%
Monte Carlo Simulation
33%
Power Efficient
33%
Convergence Time
33%
Low-voltage Design
33%
Machine Learning Techniques
33%
Simulation-based Approach
33%
Force Model
33%
Design Yield
33%
Sizing Method
33%
Force-directed Model
33%
Analog Circuit Sizing
33%
Low-power Analog Design
33%
Computer Science
Analog Circuit
100%
Machine Learning
100%
Learning System
100%
Evolutionary Algorithm
100%
Process Variation
75%
Speed-up
50%
Power Efficient
25%
Monte Carlo Simulation
25%
Prediction Model
25%
Process Optimization
25%
High Reliability
25%
Machine Learning Technique
25%
Engineering
Analog Circuit
100%
Learning System
100%
Process Variation
75%
Adaptability
25%
Convergence Time
25%
Machine Learning Technique
25%
Analog Design
25%
Force Model
25%