Low temperature SER and noise in a high speed DRAM

W. H. Henkels*, N. C.C. Lu, Wei Hwang, T. V. Rajeevakumar, R. L. Franch, K. A. Jenkins, T. J. Bucelot, D. F. Heidel, M. J. Immediato

*此作品的通信作者

研究成果: Paper同行評審

3 引文 斯高帕斯(Scopus)

摘要

The soft error rate (SER) and power bus noise were measured for a high-speed 512 kb CMOS DRAM (dynamic random access memory) operated at liquid-nitrogen temperatures. The SER decreased by about 3-20 times, depending upon cycle time and data type, and the power bus noise increased, but only modestly, at low temperature. These results show that the noise and SER do not preclude high-speed cryogenic DRAM operation. Compensation of increased inductive noise by decreased resistive noise is found to be a significant advantage in obtaining speed improvement by temperature reduction, rather than by room-temperature circuit and device techniques.

原文English
頁面5-9
頁數5
DOIs
出版狀態Published - 1 12月 1989
事件Proceedings of the Workshop on Low Temperature Semiconductor Electronics 1989 - Burlington, VT, USA
持續時間: 7 8月 19898 8月 1989

Conference

ConferenceProceedings of the Workshop on Low Temperature Semiconductor Electronics 1989
城市Burlington, VT, USA
期間7/08/898/08/89

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