Low temperature epitaxial growth of PZT on conductive perovskite LaNiO 3 electrode for embedded capacitor-over-interconnect (COI) FeRAM application

S. L. Lung, C. L. Liu*, S. S. Chen, S. C. Lai, C. W. Tsai, T. T. Sheng, Ta-Hui Wang, Sam Pan, T. B. Wu, Rich Liu

*此作品的通信作者

    研究成果: Conference article同行評審

    7 引文 斯高帕斯(Scopus)

    摘要

    By using a conductive perovskite LaNiO 3 (LNO) bottom electrode as seed layer, the crystallization temperature of in-situ sputter deposited PZT has been greatly reduced from 600°C to 350°C∼400°C. LNO's near-perfect lattice match with PZT allows PZT to growth epitaxially at low temperature. The 2Pr value of the low temperature grown PZT is about 20 μC/cm 2 , and this provides 130mV-400mV sense margin when bit line capacitance is 800fF. When Pt is used as the top electrode, an amorphous layer, which degrades the electric fatigue performance, is found at the interface of Pt and PZT. When the top electrode is replaced by LNO, the thickness of the amorphous layer is decreased, and fatigue is improved. COI FeRAM structure can be easily achieved by this low temperature capacitor process, and is suitable for advanced Cu/low-K embedded logic application.

    原文English
    頁(從 - 到)275-278
    頁數4
    期刊Technical Digest - International Electron Devices Meeting
    DOIs
    出版狀態Published - 1 12月 2001
    事件IEEE International Electron Devices Meeting IEDM 2001 - Washington, DC, United States
    持續時間: 2 12月 20015 12月 2001

    指紋

    深入研究「Low temperature epitaxial growth of PZT on conductive perovskite LaNiO 3 electrode for embedded capacitor-over-interconnect (COI) FeRAM application」主題。共同形成了獨特的指紋。

    引用此