Low temperature 12 ns DRAM

W. H. Henkels; N. C.C. Lu; Wei Hwang; T. V. Rajeevakumar; R. L. Franch; K. A. Jenkins; T. J. Bucelot; D. F. Heidel; M. J. Immediato

Low temperature 12 ns DRAM

W. H. Henkels^*, N. C.C. Lu, Wei Hwang, T. V. Rajeevakumar, R. L. Franch, K. A. Jenkins, T. J. Bucelot, D. F. Heidel, M. J. Immediato

^*此作品的通信作者

國際半導體產業學院

研究成果: Paper › 同行評審

3 引文斯高帕斯（Scopus）

摘要

Results are presented of measurements on cryogenic operation of a high-speed 512-kb CMOS dynamic RAM (DRAM). Comprehensive investigations focused on circuit concerns particularly relevant to high speed. The measured access time was 12 ns, and the results show that noise, power, and soft error rate do not preclude very-high-speed DRAM operation at cryogenic temperatures. Compared to room-temperature operation the observed improvement in access time was about 1.7× for V_DD = 5 V. Compared to 85°C operation the improvement was 2.2×.

原文	English
頁面	32-35
頁數	4
出版狀態	Published - 1 12月 1989
事件	International Symposium on VLSI Technology, Systems and Applications - Proceedings of Technical Papers - Taipei, Taiwan 持續時間: 17 5月 1989 → 19 5月 1989

Conference

Conference	International Symposium on VLSI Technology, Systems and Applications - Proceedings of Technical Papers
城市	Taipei, Taiwan
期間	17/05/89 → 19/05/89

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Link to publication in Scopus

引用此

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title = "Low temperature 12 ns DRAM",

abstract = "Results are presented of measurements on cryogenic operation of a high-speed 512-kb CMOS dynamic RAM (DRAM). Comprehensive investigations focused on circuit concerns particularly relevant to high speed. The measured access time was 12 ns, and the results show that noise, power, and soft error rate do not preclude very-high-speed DRAM operation at cryogenic temperatures. Compared to room-temperature operation the observed improvement in access time was about 1.7× for VDD = 5 V. Compared to 85°C operation the improvement was 2.2×.",

author = "Henkels, {W. H.} and Lu, {N. C.C.} and Wei Hwang and Rajeevakumar, {T. V.} and Franch, {R. L.} and Jenkins, {K. A.} and Bucelot, {T. J.} and Heidel, {D. F.} and Immediato, {M. J.}",

year = "1989",

month = dec,

day = "1",

language = "English",

pages = "32--35",

note = "null ; Conference date: 17-05-1989 Through 19-05-1989",

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TY - CONF

T1 - Low temperature 12 ns DRAM

AU - Henkels, W. H.

AU - Lu, N. C.C.

AU - Hwang, Wei

AU - Rajeevakumar, T. V.

AU - Franch, R. L.

AU - Jenkins, K. A.

AU - Bucelot, T. J.

AU - Heidel, D. F.

AU - Immediato, M. J.

PY - 1989/12/1

Y1 - 1989/12/1

N2 - Results are presented of measurements on cryogenic operation of a high-speed 512-kb CMOS dynamic RAM (DRAM). Comprehensive investigations focused on circuit concerns particularly relevant to high speed. The measured access time was 12 ns, and the results show that noise, power, and soft error rate do not preclude very-high-speed DRAM operation at cryogenic temperatures. Compared to room-temperature operation the observed improvement in access time was about 1.7× for VDD = 5 V. Compared to 85°C operation the improvement was 2.2×.

AB - Results are presented of measurements on cryogenic operation of a high-speed 512-kb CMOS dynamic RAM (DRAM). Comprehensive investigations focused on circuit concerns particularly relevant to high speed. The measured access time was 12 ns, and the results show that noise, power, and soft error rate do not preclude very-high-speed DRAM operation at cryogenic temperatures. Compared to room-temperature operation the observed improvement in access time was about 1.7× for VDD = 5 V. Compared to 85°C operation the improvement was 2.2×.

UR - http://www.scopus.com/inward/record.url?scp=0024914486&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0024914486

SP - 32

EP - 35

Y2 - 17 May 1989 through 19 May 1989

ER -

Low temperature 12 ns DRAM

摘要

Conference

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