Low-power wordline voltage generator for low-voltage flash memory

Tzu Ming Wang*, Ming-Dou Ker, Steve Yeh, Ya Chun Chang

*此作品的通信作者

    研究成果: Conference contribution同行評審

    3 引文 斯高帕斯(Scopus)

    摘要

    Wordline voltage generating circuit with high speed active mode and low power standby mode is proposed. In the active mode, two different ring oscillators with high clock frequency (fCLK) 170MHz, and low clock frequency (fCLK) 2SMHz which is also the operating frequency of the entire circuit, are employed. The proposed circuit has a short response time of 3μs typically in active mode, and very low standby current about 3μA in standby mode.

    原文English
    主出版物標題ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems
    頁面220-223
    頁數4
    DOIs
    出版狀態Published - 2006
    事件ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems - Nice, France
    持續時間: 10 12月 200613 12月 2006

    出版系列

    名字Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

    Conference

    ConferenceICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems
    國家/地區France
    城市Nice
    期間10/12/0613/12/06

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