Low-power memory device with NiSi2 nanocrystals embedded in silicon dioxide layer

P. H. Yeh*, C. H. Yu, L. J. Chen, H. H. Wu, Po-Tsun Liu, T. C. Chang

*此作品的通信作者

研究成果: Article同行評審

37 引文 斯高帕斯(Scopus)

摘要

A metal-oxide-semiconductor structure with NiSi2 nanocrystals embedded in the SiO2 layer has been fabricated. A pronounced capacitance-voltage hysteresis was observed with a memory window of 1 V under the 2 V programming voltage. The processing of the structure is compatible with the current manufacturing technology of semiconductor industry.

原文English
文章編號193504
頁(從 - 到)1-3
頁數3
期刊Applied Physics Letters
87
發行號19
DOIs
出版狀態Published - 7 11月 2005

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