Low power gate driver circuits for narrow bezel panel application

Guang Ting Zheng, Po Tsun Liu*, Meng Chyi Wu, Meng Chuan Yang, Li Wei Chu, Che Yao Wu

*此作品的通信作者

研究成果: Conference article同行評審

15 引文 斯高帕斯(Scopus)

摘要

A new integrated gate driver applies multi-clock signals to enable the pulling up transistor to have ability of output discharging. It has been verified to achieve low power consumption, high reliability, and narrow size for TFT-LCD application. Moreover, a 4.2-inch WVGA panel employing a-Si:H TFT-LCD process has been successfully demonstrated.

原文English
頁(從 - 到)1076-1078
頁數3
期刊Digest of Technical Papers - SID International Symposium
43
發行號1
DOIs
出版狀態Published - 1 1月 2012
事件49th SID International Symposium, Seminar and Exhibition, dubbed Display Week, 2012 - Boston, 美國
持續時間: 3 6月 20128 6月 2012

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