摘要
A low-noise amplifier (LNA) with cascode structure and shunt-peaking load is presented in this article. Both Narrow-band input impedance and wide-band input impedance LNAs were implemented in 0.18 m CMOS process. Maximum power gain of the narrow-band input impedance LNA is 19.3 dB; maximum power gain of the wide-band input impedance LNA is 15.3 dB. Minimum noise figure of the narrow-band input impedance LNA is 3.1 dB; minimum noise figure of the wide-band input impedance LNA is 3.0 dB. Power consumptions including buffers are 24.5 and 25.6 mW, respectively.
原文 | English |
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頁(從 - 到) | 603-609 |
頁數 | 7 |
期刊 | Journal of the Chinese Institute of Engineers, Transactions of the Chinese Institute of Engineers,Series A |
卷 | 38 |
發行號 | 5 |
DOIs | |
出版狀態 | Published - 4 7月 2015 |