We successfully fabricated gate stacks (ZrO 2 /GeO x /Ge) with a subnanometer equivalent oxide thickness (EOT) and low-leakage current on n-/p-Ge through plasma-enhanced atomic layer deposition (ALD). A 0.78-nm-thick GeO x was formed through plasma oxidation (i.e., in situ plasma interfacial passivation, followed by 3.48-nm-thick ZrO 2 growth in the same ALD reactor). A subnanometer EOT of ∼0.9 nm was achieved with a relatively high dielectric constant (roughly 30) of tetragonal-phase ZrO 2 . The gate leakage was ∼ 1 × 10 -4 A/cm 2 at V FB -1V, and roughly 5 × 10 -5 A/cm 2 at V FB +1V on p- and n-type Ge, respectively. Our ZrO 2 stabilized in the tetragonal phase, when the post-deposition annealing temperature, was higher than 500 °C. Therefore, the proposed scheme is simple and effective for use in pursuing an ultralow EOT gate dielectric on Ge.
|頁（從 - 到）||138-141|
|期刊||IEEE Electron Device Letters|
|出版狀態||Published - 1 2月 2016|