Low interface trap density Al2O3/In 0.53Ga0.47As MOS capacitor fabricated on MOCVD-grown InGaAs epitaxial layer on Si substrate

Yueh Chin Lin, Mao Lin Huang, Chen Yu Chen, Meng Ku Chen, Hung Ta Lin, Pang Yan Tsai, Chun Hsiung Lin, Hui Cheng Chang, Tze Liang Lee, Chia Chiung Lo, Syun Ming Jang, Carlos H. Diaz, He Yong Hwang, Yuan Chen Sun, Edward Yi Chang*

*此作品的通信作者

研究成果: Article同行評審

18 引文 斯高帕斯(Scopus)

摘要

A low interface trap density (Dit) Al2O3/In 0.53Ga0.47As/Si MOS capacitor fabricated on an In 0.53Ga0.47As heterostructure layer directly grown on a 300mm on-axis Si(100) substrate by MOCVD with a very thin buffer layer is demonstrated. Compared with the MOS capacitors fabricated on the In 0.53Ga0.47As layer grown on the lattice-matched InP substrate, the Al2O3/In0.53Ga0.47As MOS capacitors fabricated on the Si substrate exhibit excellent capacitance-voltage characteristics with a small frequency dispersion of approximately 2.5%/decade and a low interface trap density Dit close to 5.5 × 1011cm-2 eV-1. The results indicate the potential of integrating high-mobility InGaAs-based materials on a 300mm Si wafer for post- CMOS device application in the future.

原文English
文章編號041202
期刊Applied Physics Express
7
發行號4
DOIs
出版狀態Published - 4月 2014

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