TY - GEN
T1 - Learning Based Placement Refinement to Reduce DRC Short Violations
AU - Huang, Ying Yao
AU - Lin, Chang Tzu
AU - Liang, Wei Lun
AU - Chen, Hung Ming
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021/4/19
Y1 - 2021/4/19
N2 - With the increasing complexity of the design rules, the routability has become one of the most essential factors that should be considered in the placement stage; however, being the routable basis of the placer in the past, the congestion map given by global routing cannot display the trend of routabiliy nowadays. If we want more comprehensive and close to the actual routing information, we must execute the complete flow including global routing and detailed routing, which is time-consuming. Therefore, how to access the accurate routing information rapidly is an important issue. This paper proposes a machine learning method and put it into our placement flow to help us solve the above problem. In this machine learning model, the features contain the information of placement itself and the global routing congestion. We utilize the model to predict the position of the detailed routing violations and feed the information back to placement system, and generate a new placement result afterwards. Experimental results show that comparing with the result of the original placer, the proposed methodologies can effectively decrease the number of the DRC violations.
AB - With the increasing complexity of the design rules, the routability has become one of the most essential factors that should be considered in the placement stage; however, being the routable basis of the placer in the past, the congestion map given by global routing cannot display the trend of routabiliy nowadays. If we want more comprehensive and close to the actual routing information, we must execute the complete flow including global routing and detailed routing, which is time-consuming. Therefore, how to access the accurate routing information rapidly is an important issue. This paper proposes a machine learning method and put it into our placement flow to help us solve the above problem. In this machine learning model, the features contain the information of placement itself and the global routing congestion. We utilize the model to predict the position of the detailed routing violations and feed the information back to placement system, and generate a new placement result afterwards. Experimental results show that comparing with the result of the original placer, the proposed methodologies can effectively decrease the number of the DRC violations.
UR - http://www.scopus.com/inward/record.url?scp=85106636435&partnerID=8YFLogxK
U2 - 10.1109/VLSI-DAT52063.2021.9427321
DO - 10.1109/VLSI-DAT52063.2021.9427321
M3 - Conference contribution
AN - SCOPUS:85106636435
T3 - 2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Proceedings
BT - 2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021
Y2 - 19 April 2021 through 22 April 2021
ER -