TY - CHAP
T1 - Layout tools for analog integrated circuits and mixed-signal systems-on-chip
T2 - A survey
AU - Rutenbar, Rob A.
AU - Cohn, John M.
AU - Lin, Po-Hung
AU - Baskaya, Faik
PY - 2017/1/1
Y1 - 2017/1/1
N2 - Layout for digital integrated circuits (ICs) is usually regarded as a dicult task because of the scale of the problem: millions of gates, kilometers of routed wires, complex delay, and timing interactions. Analog designs and the analog portions of mixed-signal systems-on-chips (SoCs) are usually much smaller-up to 100 devices in a cell, usually less than 20,000 devices in a complete subsystem-and yet they are nothing if not more dicult to lay out. Why is this? e answer is that the complexity of analog circuits is not so much due to the number of devices, as to the complex interactions among the devices, the various continuous-valued performance specications, the fabrication process, and the operating environment.
AB - Layout for digital integrated circuits (ICs) is usually regarded as a dicult task because of the scale of the problem: millions of gates, kilometers of routed wires, complex delay, and timing interactions. Analog designs and the analog portions of mixed-signal systems-on-chips (SoCs) are usually much smaller-up to 100 devices in a cell, usually less than 20,000 devices in a complete subsystem-and yet they are nothing if not more dicult to lay out. Why is this? e answer is that the complexity of analog circuits is not so much due to the number of devices, as to the complex interactions among the devices, the various continuous-valued performance specications, the fabrication process, and the operating environment.
UR - http://www.scopus.com/inward/record.url?scp=85052778692&partnerID=8YFLogxK
U2 - 10.1201/9781315215112
DO - 10.1201/9781315215112
M3 - Chapter
AN - SCOPUS:85052778692
SN - 9781482254600
SP - 479
EP - 500
BT - Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology
PB - CRC Press
ER -