Layout Synthesis of Analog Primitive Cells with Variational Autoencoder

Po Chun Wang; Mark Po Hung Lin; Chien Nan Jimmy Liu; Hung Ming Chen

doi:10.1109/SMACD58065.2023.10192172

Layout Synthesis of Analog Primitive Cells with Variational Autoencoder

Po Chun Wang, Mark Po Hung Lin, Chien Nan Jimmy Liu, Hung Ming Chen

研究成果: Conference contribution › 同行評審

2 引文斯高帕斯（Scopus）

摘要

In analog layout design, the layout design styles of analog building blocks usually have the greatest impact on circuit performance. This paper introduces a new problem formulation and novel methodology for analog building block (a.k.a. primitive cell) layout synthesis. It extracts various building block placement and routing topologies from legacy layouts in the analog design repository, learns topologies through variational autoencoder, and finally synthesizes the building block layouts with the trained model as routing guidance. Experiment results show that the proposed approach can achieve even better performance compared with the conventional analog building block generation or migration approach.

原文	English
主出版物標題	Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
發行者	Institute of Electrical and Electronics Engineers Inc.
ISBN（電子）	9798350332650
DOIs	https://doi.org/10.1109/SMACD58065.2023.10192172
出版狀態	Published - 2023
事件	19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 - Funchal, Portugal 持續時間: 3 7月 2023 → 5 7月 2023

出版系列

名字	Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023

Conference

Conference	19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
國家/地區	Portugal
城市	Funchal
期間	3/07/23 → 5/07/23

存取文件

10.1109/SMACD58065.2023.10192172

其它文件與鏈接

Link to publication in Scopus

引用此

Wang, P. C., Lin, M. P. H., Liu, C. N. J., & Chen, H. M. (2023). Layout Synthesis of Analog Primitive Cells with Variational Autoencoder. 於 Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 (Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SMACD58065.2023.10192172

Wang, Po Chun ; Lin, Mark Po Hung ; Liu, Chien Nan Jimmy 等. / Layout Synthesis of Analog Primitive Cells with Variational Autoencoder. Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023. Institute of Electrical and Electronics Engineers Inc., 2023. (Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023).

@inproceedings{c25378f3b57542b3be52eff6f8ae9bba,

title = "Layout Synthesis of Analog Primitive Cells with Variational Autoencoder",

abstract = "In analog layout design, the layout design styles of analog building blocks usually have the greatest impact on circuit performance. This paper introduces a new problem formulation and novel methodology for analog building block (a.k.a. primitive cell) layout synthesis. It extracts various building block placement and routing topologies from legacy layouts in the analog design repository, learns topologies through variational autoencoder, and finally synthesizes the building block layouts with the trained model as routing guidance. Experiment results show that the proposed approach can achieve even better performance compared with the conventional analog building block generation or migration approach.",

author = "Wang, {Po Chun} and Lin, {Mark Po Hung} and Liu, {Chien Nan Jimmy} and Chen, {Hung Ming}",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 ; Conference date: 03-07-2023 Through 05-07-2023",

year = "2023",

doi = "10.1109/SMACD58065.2023.10192172",

language = "English",

series = "Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023",

address = "United States",

}

Wang, PC, Lin, MPH , Liu, CNJ & Chen, HM 2023, Layout Synthesis of Analog Primitive Cells with Variational Autoencoder. 於 Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023. Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023, Institute of Electrical and Electronics Engineers Inc., 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023, Funchal, Portugal, 3/07/23. https://doi.org/10.1109/SMACD58065.2023.10192172

Layout Synthesis of Analog Primitive Cells with Variational Autoencoder. / Wang, Po Chun; Lin, Mark Po Hung ; Liu, Chien Nan Jimmy 等.
Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023. Institute of Electrical and Electronics Engineers Inc., 2023. (Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - Layout Synthesis of Analog Primitive Cells with Variational Autoencoder

AU - Wang, Po Chun

AU - Lin, Mark Po Hung

AU - Liu, Chien Nan Jimmy

AU - Chen, Hung Ming

PY - 2023

Y1 - 2023

N2 - In analog layout design, the layout design styles of analog building blocks usually have the greatest impact on circuit performance. This paper introduces a new problem formulation and novel methodology for analog building block (a.k.a. primitive cell) layout synthesis. It extracts various building block placement and routing topologies from legacy layouts in the analog design repository, learns topologies through variational autoencoder, and finally synthesizes the building block layouts with the trained model as routing guidance. Experiment results show that the proposed approach can achieve even better performance compared with the conventional analog building block generation or migration approach.

AB - In analog layout design, the layout design styles of analog building blocks usually have the greatest impact on circuit performance. This paper introduces a new problem formulation and novel methodology for analog building block (a.k.a. primitive cell) layout synthesis. It extracts various building block placement and routing topologies from legacy layouts in the analog design repository, learns topologies through variational autoencoder, and finally synthesizes the building block layouts with the trained model as routing guidance. Experiment results show that the proposed approach can achieve even better performance compared with the conventional analog building block generation or migration approach.

UR - http://www.scopus.com/inward/record.url?scp=85168692553&partnerID=8YFLogxK

U2 - 10.1109/SMACD58065.2023.10192172

DO - 10.1109/SMACD58065.2023.10192172

M3 - Conference contribution

AN - SCOPUS:85168692553

T3 - Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023

BT - Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023

Y2 - 3 July 2023 through 5 July 2023

ER -

Wang PC, Lin MPH , Liu CNJ , Chen HM. Layout Synthesis of Analog Primitive Cells with Variational Autoencoder. 於 Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023. Institute of Electrical and Electronics Engineers Inc. 2023. (Proceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023). doi: 10.1109/SMACD58065.2023.10192172

Layout Synthesis of Analog Primitive Cells with Variational Autoencoder

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