Layout dependent effects on high frequency performance parameters like f
, and RF noise in sub-40nm multi-finger MOSFETs is investigated in this paper. Narrow-OD MOSFET with smaller finger width and larger finger number can achieve lower R
and higher f
. However, these narrow-OD devices suffer f
degradation and higher noise figure, even with the advantage of lower R
. The mechanisms responsible for the trade-off between different parameters will be presented to provide an important guideline of device layout for RF circuits design using nanoscale CMOS technology.