Late-news poster: A compact high-speed low-power rail-to-rail class-B buffer amplifier-for LCD application

Chih Wen Lu*

*此作品的通信作者

研究成果: Conference article同行評審

2 引文 斯高帕斯(Scopus)

摘要

A compact high-speed low-power rail-to-rail class-B buffer amplifier, which is suitable for liquid crystal display applications, is proposed. The amplifiers are biased by each other to reduce the power consumption and the die area. The buffer draws little current while static but has a large driving capability while transient. The circuit achieves the large driving capability by employing simple comparators to sense the transients of the input to turn on the output stages, which are statically off in the stable state. This increases the speed of the circuit without increasing static power consumption too much. An experimental prototype output buffer implemented in a 0.35-μm CMOS technology demonstrates that the circuit can operate under a wide power supply range. Quiescent current of 4 μA is measured. The buffer exhibits the settling time of 1.5 μs for a voltage swing of 0.1 ∼ (VDD - 0.1) V under a 600 pF capacitance load. The area of this buffer is 32×109 μm 2.

原文English
頁(從 - 到)410-413
頁數4
期刊Digest of Technical Papers - SID International Symposium
37
發行號1
DOIs
出版狀態Published - 2006
事件44th International Symposium, Seminar, and Exhibition, SID 2006 - San Francisco, CA, United States
持續時間: 4 6月 20069 6月 2006

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