Large-scale "atomistic" approach to discrete-dopant-induced characteristic fluctuations in silicon nanowire transistors

Nanowire fin-typed field effect transistors (FinFETs) are ultimate structures and potential candidates for next generation nanoelectronic devices. Due to the limitation of manufacturability, nanowire transistors with a perfect gate structure (i.e., a surrounding gate with 100% gate-coverage ratio) theoretically are not always guaranteed. Impact of the discrete dopants on device performance is crucial in determining the behaviour of nanoscale semiconductor devices. The immunity of nanowire transistor against random discrete-dopant-induced fluctuation may suffer from the variation of gate-coverage-ratio. Therefore, in this paper, we for the fist time study the impact of non-ideal gate coverage on immunity against random-dopantinduced fluctuations for nanowire FinFETs. A 3D statistically sound " atomistic" approach for analyzing random-dopant effect in nanodevice is presented. Discrete dopants are statistically positioned into the channel region to examine associated carrier transportation characteristics, concurrently capturing "dopant concentration variation" and "dopant position fluctuation". Our results confirm that the influence of non-ideal gate coverage disturbs the channel controllability of nanowire FinFETs and thus decreases the immunity against discrete-dopant-induced fluctuation. This study provides an insight into the problem of fluctuation in nanowire transistors and shows the importance of gate-coverage ratio on device's immunity against discrete-dopant-induced fluctuation.