Large array device characteristics improvements

Shao Chang Huang*, Ching Ho Li, Chih Cherng Liao, Li Fan Chen, Chun Chih Chen, Kai Chieh Hsu, Gong Kai Lin, Chih Hsuan Lin, Jian Hsing Lee, Yu Yung Kao, Ke Horng Chen

*此作品的通信作者

研究成果: Article同行評審

摘要

Large array devices are often used for big current driving capabilities in power electronic integrated circuit (IC) applications. Since these structures have big sizes, typical electrostatic discharge protection methodologies cannot be applied in such kind of IC. Otherwise, IC will become too huge to marketing. In this paper, a novel signal control switching architecture for adding large array devices' ESD performances is proposed. Only a little layout area is increased, but a huge electrostatic discharge robustness improvement can be obtained. Moreover, electrical safe operation area characteristics of large array devices are also improved very much with this new scheme. This study is processed in 0.15 μm Bipolar CMOS DMOS (BCD) with silicide technologies.

原文English
文章編號114353
期刊Microelectronics Reliability
125
DOIs
出版狀態Published - 10月 2021

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