Junction and device characteristics of gate-last ge p- and n-MOSFETs with ALD-Al₂O₃ gate dielectric

In this paper, we investigated the characteristics of Ge junction diodes and gate-last p- and n-metal-oxide-semiconductor field-effect transistors with the atomic-layer-deposited- Al₂O₃ gate dielectrics. The magnitudes of the rectifying ratios for the Ge p⁺-n and n⁺-p junctions exceeded three and four orders of magnitude (in the voltage range of ±1 V), respectively, with accompanying reverse leakages of ca. 10^-2 and 10^-4 A · cm^-2, respectively. The site of the primary leakage path, at either the surface periphery or junction area, was determined by the following conditions: 1) the thermal budget during dopant activation, and 2) whether forming gas annealing (FGA) was employed or not. In addition, performing FGA at 300 °C boosted the device on-current, decreased the Al²O³/Ge interface states to 8 × 10¹¹cm^-2 · eV^-1, and improved the reliability of bias temperature instability. The peak mobility and on/off ratio reached as high as 225 cm² · V^-1 · s^-1 and 10³, respectively, for the p-FET (W/L = 100 μm/ 4 μm), while these values were less than 100 cm² · V^-1 · s^-1 and ca. 10³, respectively, for the n-FET (W/L = 100 μm/9 μm). The relatively inferior n-FET performance resulted from the larger source/drain contact resistance, higher surface states scattering, and lower substrate-doping concentration.