Investigation on safe operating area and ESD robustness in a 60-V BCD process with different deep P-Well test structures

Chia Tsen Dai, Ming-Dou Ker

    研究成果: Conference contribution同行評審

    8 引文 斯高帕斯(Scopus)

    摘要

    Safe operating area (SOA) is one of the noticeable reliability concerns for power MOSFETs during the normal circuit operating conditions. Besides, electrostatic discharge (ESD) reliability is another important reliability issue for the power IC products. To save the silicon area of power IC with high-voltage (HV) devices, it is preferable for HV MOSFET to be self-protected without any additional ESD protection device, and to behave wide SOA region. In this work, the impact of deep P-Well (DPW) structure to the electrical SOA (eSOA) and ESD robustness of HV MOSFET has been investigated in a 0.25-μm 60-V BCD process. DPW structure is used to implement the RESURF (reduced surface field) in MOSFET, which make it be able to sustain the high operating voltage. From the experimental results in silicon chip, the ESD robustness and eSOA of HV MOSFET can be improved by the modified DPW structure.

    原文English
    主出版物標題2013 IEEE International Conference on Microelectronic Test Structures, ICMTS 2013 - Conference Proceedings
    頁面127-130
    頁數4
    DOIs
    出版狀態Published - 9 8月 2013
    事件2013 International Conference on Microelectronic Test Structures, ICMTS 2013 - Osaka, Japan
    持續時間: 25 3月 201328 3月 2013

    出版系列

    名字IEEE International Conference on Microelectronic Test Structures

    Conference

    Conference2013 International Conference on Microelectronic Test Structures, ICMTS 2013
    國家/地區Japan
    城市Osaka
    期間25/03/1328/03/13

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