Investigation of time-dependent gate dielectric breakdown in recessed E-mode GaN MIS-HEMTs using ferroelectric charge trap gate stack (FEG-HEMT)

Zhen Hong Huang, Tsung Ying Yang, Jui Sheng Wu, Yan Kui Liang, Jen Fu Hsu, Wei Cheng Lin, Tian Li Wu*, Edward Yi Chang

*此作品的通信作者

研究成果: Article同行評審

摘要

The aim of achieving E-mode operations has led to the proposal of novel hybrid ferroelectric charge trap gate stack schemes. These schemes involve utilizing a combination of the charge trapping layer (CTL) and the ferroelectric laminated layer to positively shift the threshold voltage to a normally-off margin after initializing the gate pulse, thus achieving the Enhancement-mode (E-mode) characteristic. This study focuses on the forward gate bias time-dependent dielectric breakdown (TDDB) gate reliability in the E-Mode GaN MIS-HEMTs using ferroelectric charge trap gate stack (FEG-HEMT) with and without recess and investigates the impact of temperature on TDDB. The gate voltages required for operation with a 1 % failure rate over a 10-year period are 12.95 V and 10.22 V at 25 °C and 150 °C for both samples, respectively. Also, the examination of the stability of the recessed process by calculating the activation energies (0.7 eV) of both samples are demonstrated. The article also investigates the relationship between long-term reliability and short-term initialization by examining the transition point of the time-dependent failure curve.

原文English
文章編號115215
期刊Microelectronics Reliability
150
DOIs
出版狀態Published - 11月 2023

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