Investigation of p-GaN Gate HEMT using Removal Si Substrate and part of Buffer Layer

Y. Lin, Y. S. Chiu, E. Y. Chang

研究成果: Conference contribution同行評審

摘要

Normally-off p-GaN gate high electron mobility transistor (HEMT) on Si substrate using the back-side via process was investigated. We removed the Si substrate and part of the GaN carbon-doped layer. A 100 nm thickness of SiO2 layer is deposited on the back-side via to obstruct the buffer leakage, and a 1um thick gold is electroplated to improve the self-heating effect. With and without the backside via process, the threshold voltages are 0.92 and 1.45 V, the on/off drain current ratios are 5×1010 and 5×108, the subthreshold swings are 154 and 224 mV/dec, the static on-resistances are 24.77 and 27.55 Ω.mm, and the dynamic on-resistance ratios are 1.18 and 1.3.

原文English
主出版物標題Proceedings - 2022 IET International Conference on Engineering Technologies and Applications, IET-ICETA 2022
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781665491389
DOIs
出版狀態Published - 2022
事件2022 IET International Conference on Engineering Technologies and Applications, IET-ICETA 2022 - Changhua, Taiwan
持續時間: 14 10月 202216 10月 2022

出版系列

名字Proceedings - 2022 IET International Conference on Engineering Technologies and Applications, IET-ICETA 2022

Conference

Conference2022 IET International Conference on Engineering Technologies and Applications, IET-ICETA 2022
國家/地區Taiwan
城市Changhua
期間14/10/2216/10/22

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