Investigation of hot carrier reliability of ultrathin poly-Si nanobelt junctionless (UTNB-JL) transistors on different underlying insulators

Jen Hong Chang, Chun Chih Chung, Jer Yi Lin, Tien-Sheng Chao

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

In this work, we investigate the hot carrier stress (HCS) of ultrathin poly-Si nanobelt junctionless transistors on different insulator (TEOS and Si3N4). Time exponent n suggests the oxide trap charge is the dominant mechanism. The subthreshold slope (S.S.) is improved by acceptor-like interface states generated after HCS, and different S.S. improvement between JL-O and JL-N is caused by surface roughness of channel films resulting from nucleation during channel deposition in LPCVD step.

原文English
主出版物標題2016 5th International Symposium on Next-Generation Electronics, ISNE 2016
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781509024391
DOIs
出版狀態Published - 12 8月 2016
事件5th International Symposium on Next-Generation Electronics, ISNE 2016 - Hsinchu, 台灣
持續時間: 4 5月 20166 5月 2016

出版系列

名字2016 5th International Symposium on Next-Generation Electronics, ISNE 2016

Conference

Conference5th International Symposium on Next-Generation Electronics, ISNE 2016
國家/地區台灣
城市Hsinchu
期間4/05/166/05/16

指紋

深入研究「Investigation of hot carrier reliability of ultrathin poly-Si nanobelt junctionless (UTNB-JL) transistors on different underlying insulators」主題。共同形成了獨特的指紋。

引用此