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Investigation of gate oxide short in FinFETs and the test methods for FinFET SRAMs
Chen Wei Lin,
Chia-Tso Chao
, Chih Chieh Hsu
電子研究所
研究成果
:
Conference contribution
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同行評審
11
引文 斯高帕斯(Scopus)
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深入研究「Investigation of gate oxide short in FinFETs and the test methods for FinFET SRAMs」主題。共同形成了獨特的指紋。
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Keyphrases
Bulk MOSFET
28%
CMOS Technology
14%
Defect Characteristics
14%
Device Level
14%
Dielectric Thickness
14%
Electrical Characteristics
14%
Fault Behavior
42%
Fin Field-effect Transistor (FinFET)
100%
Gate Oxide Short
100%
Independent Gate FinFET
14%
Line Edge Roughness
14%
Mixed-mode Simulation
14%
Nanometer Scale
14%
New Test Method
14%
Test Efficiency
14%
TFET SRAMs
100%
Transient Simulation
14%
Engineering
Dielectrics
14%
Edge Roughness
14%
Gate Oxide
100%
Metal-Oxide-Semiconductor Field-Effect Transistor
28%
Mixed Mode
14%
Nanometre
14%
Test Method
100%
Transients
14%
Physics
Dielectric Material
50%
Field Effect Transistor
100%
Transients
50%
Material Science
Dielectric Material
14%
Electrical Property
14%
Metal-Oxide-Semiconductor Field-Effect Transistor
28%
Oxide Compound
100%