Investigation of 4H-SiC UMOSFET Architectures for High Voltage and High Speed Power Switching Applications

Chia Lung Hung*, Yi Kai Hsiao, Chang Ching Tu, Hao Chung Kuo


研究成果: Chapter同行評審


A comparative TCAD (Technology Computer Aided Design) simulation study of various 4H-SiC trench gate MOSFET (Metal Oxide Semiconductor Field Effect Transistor) (or U-shaped trench gate MOSFET abbreviated for UMOSFET) architectures for high voltage and high-speed switching applications is reported. The DC (Direct Current) and AC (Alternating Current) characteristics of the different trench gate structures are investigated. Particularly, compared to conventional 4H-SiC UMOSFETs, the breakdown voltage of the UMOSFET having a p-type implanted bottom shield is increased by 44%. However, due to the extra JFET (Junction Field Effect Transistor) region, the specific on resistance also increases by 6%. Furthermore, under 1000 V drain bias, the peak electric field at the bottom oxide of the shielded trench gate is below 0.3 MV/cm. In contrast, the peak electric field of conventional UMOSFETs can be as high as 8 MV/cm, which might cause reliability issues. On the other hand, when the bottom oxide thickness of the trench gate is increased, the UMOSFET exhibits 22% less total gate charge, leading to 76% and 71% shorter switching delay time, compared to conventional UMOSFETs and bottom shield UMOSFETs, respectively. As revealed by the simulation results, the UMOSFETs with the p-type implanted bottom shield or thick bottom oxide are advantageous for high voltage and high-speed power switching applications.

主出版物標題Materials Science Forum
發行者Trans Tech Publications Ltd
出版狀態Published - 2023


名字Materials Science Forum


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