Internal ESD transients in input protection circuits

Y. Fong; Chen-Ming Hu

doi:10.1109/RELPHY.1989.36321

Internal ESD transients in input protection circuits

Y. Fong^*, Chen-Ming Hu

^*此作品的通信作者

國際半導體產業學院

研究成果: Paper › 同行評審

13 引文斯高帕斯（Scopus）

摘要

The operation of a popular thick-field-device/grounded-gate transistor combination input protection circuit under electrostatic-discharge (ESD) stress is studied using a special test circuit. By monitoring internal voltages and currents, it was possible to observe how each element in the protection circuit contributed to the overall ESD protection. By means of the special test circuit it was determined that no degradation of the first gate-oxide transistor took place under ESD stress.

原文	English
頁面	77-81
頁數	5
DOIs	https://doi.org/10.1109/RELPHY.1989.36321
出版狀態	Published - 1 12月 1989
事件	27th Annual Proceedings: Reliability Physics - 1989 - 持續時間: 11 4月 1989 → 11 4月 1989

Conference

Conference	27th Annual Proceedings: Reliability Physics - 1989
期間	11/04/89 → 11/04/89

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10.1109/RELPHY.1989.36321

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引用此

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title = "Internal ESD transients in input protection circuits",

abstract = "The operation of a popular thick-field-device/grounded-gate transistor combination input protection circuit under electrostatic-discharge (ESD) stress is studied using a special test circuit. By monitoring internal voltages and currents, it was possible to observe how each element in the protection circuit contributed to the overall ESD protection. By means of the special test circuit it was determined that no degradation of the first gate-oxide transistor took place under ESD stress.",

author = "Y. Fong and Chen-Ming Hu",

year = "1989",

month = dec,

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doi = "10.1109/RELPHY.1989.36321",

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AU - Fong, Y.

AU - Hu, Chen-Ming

PY - 1989/12/1

Y1 - 1989/12/1

N2 - The operation of a popular thick-field-device/grounded-gate transistor combination input protection circuit under electrostatic-discharge (ESD) stress is studied using a special test circuit. By monitoring internal voltages and currents, it was possible to observe how each element in the protection circuit contributed to the overall ESD protection. By means of the special test circuit it was determined that no degradation of the first gate-oxide transistor took place under ESD stress.

AB - The operation of a popular thick-field-device/grounded-gate transistor combination input protection circuit under electrostatic-discharge (ESD) stress is studied using a special test circuit. By monitoring internal voltages and currents, it was possible to observe how each element in the protection circuit contributed to the overall ESD protection. By means of the special test circuit it was determined that no degradation of the first gate-oxide transistor took place under ESD stress.

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U2 - 10.1109/RELPHY.1989.36321

DO - 10.1109/RELPHY.1989.36321

M3 - Paper

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Y2 - 11 April 1989 through 11 April 1989

ER -

Internal ESD transients in input protection circuits

摘要

Conference

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