Interconnect optimization design with guaranteed performance methods

Trent Gwo Yann Lee*, Tseung-Yuen Tseng, Shyh Chyi Wong, Cheng Jer Yang, Mong Song Liang, Huang-Chung Cheng

*此作品的通信作者

    研究成果: Paper同行評審

    摘要

    Two optimization methods based on the delay and crosstalk performance are presented. In specific, we discussed 1) the maximum design dimension for the specified process dimension with guaranteed performance; 2) the maximum process dimension for the specified design dimension with guaranteed performance. The proposed guaranteed-performance interconnect design method is believed to be useful in VLSI synthesis, process design as well as layout optimization.

    原文English
    頁面295-298
    頁數4
    出版狀態Published - 3 9月 2001
    事件9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems - Singapore, Singapore
    持續時間: 3 9月 20015 9月 2001

    Conference

    Conference9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems
    國家/地區Singapore
    城市Singapore
    期間3/09/015/09/01

    指紋

    深入研究「Interconnect optimization design with guaranteed performance methods」主題。共同形成了獨特的指紋。

    引用此