Interconnect optimization design with guaranteed performance methods

Trent Gwo Yann Lee; Tseung-Yuen Tseng; Shyh Chyi Wong; Cheng Jer Yang; Mong Song Liang; Huang-Chung Cheng

Interconnect optimization design with guaranteed performance methods

Trent Gwo Yann Lee^*, Tseung-Yuen Tseng, Shyh Chyi Wong, Cheng Jer Yang, Mong Song Liang, Huang-Chung Cheng

^*此作品的通信作者

研究成果 › 同行評審

摘要

Two optimization methods based on the delay and crosstalk performance are presented. In specific, we discussed 1) the maximum design dimension for the specified process dimension with guaranteed performance; 2) the maximum process dimension for the specified design dimension with guaranteed performance. The proposed guaranteed-performance interconnect design method is believed to be useful in VLSI synthesis, process design as well as layout optimization.

原文	English
頁面	295-298
頁數	4
出版狀態	Published - 3 9月 2001
事件	9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems - Singapore, 新加坡持續時間: 3 9月 2001 → 5 9月 2001

Conference

Conference	9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems
國家/地區	新加坡
城市	Singapore
期間	3/09/01 → 5/09/01

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title = "Interconnect optimization design with guaranteed performance methods",

abstract = "Two optimization methods based on the delay and crosstalk performance are presented. In specific, we discussed 1) the maximum design dimension for the specified process dimension with guaranteed performance; 2) the maximum process dimension for the specified design dimension with guaranteed performance. The proposed guaranteed-performance interconnect design method is believed to be useful in VLSI synthesis, process design as well as layout optimization.",

author = "Lee, {Trent Gwo Yann} and Tseung-Yuen Tseng and Wong, {Shyh Chyi} and Yang, {Cheng Jer} and Liang, {Mong Song} and Huang-Chung Cheng",

year = "2001",

month = sep,

day = "3",

language = "English",

pages = "295--298",

note = "9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems ; Conference date: 03-09-2001 Through 05-09-2001",

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TY - CONF

T1 - Interconnect optimization design with guaranteed performance methods

AU - Lee, Trent Gwo Yann

AU - Tseng, Tseung-Yuen

AU - Wong, Shyh Chyi

AU - Yang, Cheng Jer

AU - Liang, Mong Song

AU - Cheng, Huang-Chung

PY - 2001/9/3

Y1 - 2001/9/3

N2 - Two optimization methods based on the delay and crosstalk performance are presented. In specific, we discussed 1) the maximum design dimension for the specified process dimension with guaranteed performance; 2) the maximum process dimension for the specified design dimension with guaranteed performance. The proposed guaranteed-performance interconnect design method is believed to be useful in VLSI synthesis, process design as well as layout optimization.

AB - Two optimization methods based on the delay and crosstalk performance are presented. In specific, we discussed 1) the maximum design dimension for the specified process dimension with guaranteed performance; 2) the maximum process dimension for the specified design dimension with guaranteed performance. The proposed guaranteed-performance interconnect design method is believed to be useful in VLSI synthesis, process design as well as layout optimization.

UR - http://www.scopus.com/inward/record.url?scp=1842640040&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:1842640040

SP - 295

EP - 298

T2 - 9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems

Y2 - 3 September 2001 through 5 September 2001

ER -

Interconnect optimization design with guaranteed performance methods

摘要

Conference

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