Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation

Yu Che Chou; Chung Chun Hsu; Cheng Ting Chun; Chen Han Chou; Ming Li Tsai; Yi He Tsai; Wei Li Lee; Shin Yuan Wang; Guang Li Luo; Chao-Hsin Chien

doi:10.1109/NANO.2016.7751509

Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation

Yu Che Chou, Chung Chun Hsu, Cheng Ting Chun, Chen Han Chou, Ming Li Tsai, Yi He Tsai, Wei Li Lee, Shin Yuan Wang, Guang Li Luo, Chao-Hsin Chien^*

^*此作品的通信作者

電子研究所

研究成果: Conference contribution › 同行評審

2 引文斯高帕斯（Scopus）

摘要

In this work, we investigated the influence of retrograde-well implantation on hetero-structure body-tied germanium (Ge) FinFET [1]. Using structural engineering, the retrograde well was fabricated prior to Ge epitaxy, which could avoid the activated temperature of dopant in Si substrate. With optimizing the implant condition, the p-Ge/n-Si hetero-structure junction exhibited high I_ON/I_OFF ratio and lower junction leakage (4 × 10^-3 μA/cm²). Furthermore, we also make a comparison of planar and mesa junction structures, mesa junction exhibited lower junction leakage (6× 10^-6 μA/cm²) as compared with the planar one mentioned before, which could be attributed to improvement in peripheral leakage due to dislocation within Ge and Si. Comparing the difference between retrograde-well and implant-free Ge FinFETs, the drain induced barrier lowering (DIBL) was considerably improved by 50 %. Our retrograde-well Ge FinFET exhibited a high I_ON/I_OFF ratio ∼ 8×10³ (I_S) than the conventional Ge FinFET (I_ON/I_OFF ∼2×10³).

原文	English
主出版物標題	16th International Conference on Nanotechnology - IEEE NANO 2016
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	142-144
頁數	3
ISBN（電子）	9781509039142
DOIs	https://doi.org/10.1109/NANO.2016.7751509
出版狀態	Published - 8月 2016
事件	16th IEEE International Conference on Nanotechnology - IEEE NANO 2016 - Sendai, 日本持續時間: 22 8月 2016 → 25 8月 2016

出版系列

名字	16th International Conference on Nanotechnology - IEEE NANO 2016

Conference

Conference	16th IEEE International Conference on Nanotechnology - IEEE NANO 2016
國家/地區	日本
城市	Sendai
期間	22/08/16 → 25/08/16

存取文件

10.1109/NANO.2016.7751509

其它文件與鏈接

Link to publication in Scopus

引用此

Chou, Y. C., Hsu, C. C., Chun, C. T., Chou, C. H., Tsai, M. L., Tsai, Y. H., Lee, W. L., Wang, S. Y., Luo, G. L., & Chien, C.-H. (2016). Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation. 於 16th International Conference on Nanotechnology - IEEE NANO 2016 (頁 142-144). 文章 7751509 (16th International Conference on Nanotechnology - IEEE NANO 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/NANO.2016.7751509

@inproceedings{6cda7cf3789543ffbb81c609b0288514,

title = "Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation",

abstract = "In this work, we investigated the influence of retrograde-well implantation on hetero-structure body-tied germanium (Ge) FinFET [1]. Using structural engineering, the retrograde well was fabricated prior to Ge epitaxy, which could avoid the activated temperature of dopant in Si substrate. With optimizing the implant condition, the p-Ge/n-Si hetero-structure junction exhibited high ION/IOFF ratio and lower junction leakage (4 × 10-3 μA/cm2). Furthermore, we also make a comparison of planar and mesa junction structures, mesa junction exhibited lower junction leakage (6× 10-6 μA/cm2) as compared with the planar one mentioned before, which could be attributed to improvement in peripheral leakage due to dislocation within Ge and Si. Comparing the difference between retrograde-well and implant-free Ge FinFETs, the drain induced barrier lowering (DIBL) was considerably improved by 50 %. Our retrograde-well Ge FinFET exhibited a high ION/IOFF ratio ∼ 8×103 (IS) than the conventional Ge FinFET (ION/IOFF ∼2×103).",

keywords = "Body-tied Ge FinFET, DIBL (drain-induced barrier lowering), Implantation, Retrograde-well",

author = "Chou, {Yu Che} and Hsu, {Chung Chun} and Chun, {Cheng Ting} and Chou, {Chen Han} and Tsai, {Ming Li} and Tsai, {Yi He} and Lee, {Wei Li} and Wang, {Shin Yuan} and Luo, {Guang Li} and Chao-Hsin Chien",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 16th IEEE International Conference on Nanotechnology - IEEE NANO 2016 ; Conference date: 22-08-2016 Through 25-08-2016",

year = "2016",

month = aug,

doi = "10.1109/NANO.2016.7751509",

language = "English",

series = "16th International Conference on Nanotechnology - IEEE NANO 2016",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "142--144",

booktitle = "16th International Conference on Nanotechnology - IEEE NANO 2016",

address = "美國",

}

Chou, YC, Hsu, CC, Chun, CT, Chou, CH, Tsai, ML, Tsai, YH, Lee, WL, Wang, SY, Luo, GL & Chien, C-H 2016, Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation. 於 16th International Conference on Nanotechnology - IEEE NANO 2016., 7751509, 16th International Conference on Nanotechnology - IEEE NANO 2016, Institute of Electrical and Electronics Engineers Inc., 頁 142-144, 16th IEEE International Conference on Nanotechnology - IEEE NANO 2016, Sendai, 日本, 22/08/16. https://doi.org/10.1109/NANO.2016.7751509

Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation. / Chou, Yu Che; Hsu, Chung Chun; Chun, Cheng Ting 等.
16th International Conference on Nanotechnology - IEEE NANO 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 142-144 7751509 (16th International Conference on Nanotechnology - IEEE NANO 2016).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation

AU - Chou, Yu Che

AU - Hsu, Chung Chun

AU - Chun, Cheng Ting

AU - Chou, Chen Han

AU - Tsai, Ming Li

AU - Tsai, Yi He

AU - Lee, Wei Li

AU - Wang, Shin Yuan

AU - Luo, Guang Li

AU - Chien, Chao-Hsin

PY - 2016/8

Y1 - 2016/8

N2 - In this work, we investigated the influence of retrograde-well implantation on hetero-structure body-tied germanium (Ge) FinFET [1]. Using structural engineering, the retrograde well was fabricated prior to Ge epitaxy, which could avoid the activated temperature of dopant in Si substrate. With optimizing the implant condition, the p-Ge/n-Si hetero-structure junction exhibited high ION/IOFF ratio and lower junction leakage (4 × 10-3 μA/cm2). Furthermore, we also make a comparison of planar and mesa junction structures, mesa junction exhibited lower junction leakage (6× 10-6 μA/cm2) as compared with the planar one mentioned before, which could be attributed to improvement in peripheral leakage due to dislocation within Ge and Si. Comparing the difference between retrograde-well and implant-free Ge FinFETs, the drain induced barrier lowering (DIBL) was considerably improved by 50 %. Our retrograde-well Ge FinFET exhibited a high ION/IOFF ratio ∼ 8×103 (IS) than the conventional Ge FinFET (ION/IOFF ∼2×103).

AB - In this work, we investigated the influence of retrograde-well implantation on hetero-structure body-tied germanium (Ge) FinFET [1]. Using structural engineering, the retrograde well was fabricated prior to Ge epitaxy, which could avoid the activated temperature of dopant in Si substrate. With optimizing the implant condition, the p-Ge/n-Si hetero-structure junction exhibited high ION/IOFF ratio and lower junction leakage (4 × 10-3 μA/cm2). Furthermore, we also make a comparison of planar and mesa junction structures, mesa junction exhibited lower junction leakage (6× 10-6 μA/cm2) as compared with the planar one mentioned before, which could be attributed to improvement in peripheral leakage due to dislocation within Ge and Si. Comparing the difference between retrograde-well and implant-free Ge FinFETs, the drain induced barrier lowering (DIBL) was considerably improved by 50 %. Our retrograde-well Ge FinFET exhibited a high ION/IOFF ratio ∼ 8×103 (IS) than the conventional Ge FinFET (ION/IOFF ∼2×103).

KW - Body-tied Ge FinFET

KW - DIBL (drain-induced barrier lowering)

KW - Implantation

KW - Retrograde-well

UR - http://www.scopus.com/inward/record.url?scp=85006856731&partnerID=8YFLogxK

U2 - 10.1109/NANO.2016.7751509

DO - 10.1109/NANO.2016.7751509

M3 - Conference contribution

AN - SCOPUS:85006856731

T3 - 16th International Conference on Nanotechnology - IEEE NANO 2016

SP - 142

EP - 144

BT - 16th International Conference on Nanotechnology - IEEE NANO 2016

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 16th IEEE International Conference on Nanotechnology - IEEE NANO 2016

Y2 - 22 August 2016 through 25 August 2016

ER -

Chou YC, Hsu CC, Chun CT, Chou CH, Tsai ML, Tsai YH 等. Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation. 於 16th International Conference on Nanotechnology - IEEE NANO 2016. Institute of Electrical and Electronics Engineers Inc. 2016. p. 142-144. 7751509. (16th International Conference on Nanotechnology - IEEE NANO 2016). doi: 10.1109/NANO.2016.7751509

Integration of hetero-structure body-tied Ge FinFET using retrograde-well implantation

摘要

出版系列

Conference

存取文件

其它文件與鏈接

指紋

引用此