Integration Design and Process of 3-D Heterogeneous 6T SRAM with Double Layer Transferred Ge/2Si CFET and IGZO Pass Gates for 42% Reduced Cell Size

X. R. Yu*, M. H. Chuang, S. W. Chang, W. H. Chang, T. C. Hong, C. H. Chiang, W. H. Lu, C. Y. Yang, W. J. Chen, J. H. Lin, P. H. Wu, T. C. Sun, S. Kola, Y. S. Yang, Yun Da, P. J. Sung, C. T. Wu, T. C. Cho, G. L. Luo, K. H. KaoM. H. Chiang, W. C.Y. Ma, Chun-Jung Su, T. S. Chao, T. Maeda, S. Samukawa, Y. Li, Y. J. Lee, W. F. Wu, Jenn-Hwan Tarng, Y. H. Wang

*此作品的通信作者

研究成果: Conference contribution同行評審

摘要

In this work, we propose an advanced 3-D heterogeneous 6T SRAM with a newly designed hetero-integration method. CFET inverters and IGZO pass gates are vertically stacked within a 2T footprint area. The Low-Temperature Hetero-Layers Bonding Technique (LT-HBT) process is utilized successfully to fabricate single crystalline heterogeneous Double Layer Transferred (DLT) Ge/2Si CFET-OI on an 8-inch full wafer. Furthermore, an IGZO nFET is deposited and treated as a pass gate (PG) to realize a 6T SRAM operation. The hetero-integration of IGZO PG and self-align DLT Ge/2Si CFET inverters showed improved Read Static Noise Margin (RSNM) and stand-by leakage power. The state-of-the-art 3-D heterogeneous 6T SRAM leads to 42% area reduction.

原文English
主出版物標題2022 International Electron Devices Meeting, IEDM 2022
發行者Institute of Electrical and Electronics Engineers Inc.
頁面2051-2054
頁數4
ISBN(電子)9781665489591
DOIs
出版狀態Published - 2022
事件2022 International Electron Devices Meeting, IEDM 2022 - San Francisco, United States
持續時間: 3 12月 20227 12月 2022

出版系列

名字Technical Digest - International Electron Devices Meeting, IEDM
2022-December
ISSN(列印)0163-1918

Conference

Conference2022 International Electron Devices Meeting, IEDM 2022
國家/地區United States
城市San Francisco
期間3/12/227/12/22

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