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Incremental timing-driven placement with approximated signoff wire delay and regression-based cell delay
Tai Cheng Lee,
Yih Lang Li
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資訊科學與工程研究所
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引文 斯高帕斯(Scopus)
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Keyphrases
Regression-based Method
100%
Timer
100%
Wire Delay
100%
Delay-based
100%
Cell Delay
100%
Timing-driven Placement
100%
Number of Iterations
33%
Time Constraints
33%
System-on-chip Design
33%
Timing-driven
33%
Design Tools
33%
Design Requirements
33%
Accurate Estimation
33%
Tapeout
33%
Physical Design
33%
Physical Modification
33%
Timing Model
33%
Timing Closure
33%
Timing Calculations
33%
Static Timing Analysis
33%
Optimal Position
33%
Physical Implementation
33%
Implementation Procedures
33%
Cell Movement
33%
Post-optimization
33%
Computer Science
Timing Analysis
100%
Timing Requirement
100%
Design Constraint
100%
Physical Design
100%
Physical Implementation
100%
System-on-Chip
100%
Design Tool
100%
Engineering
System-on-Chip
100%
Design Constraint
100%
Physical Implementation
100%
Design Tool
100%