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Improving the Performance of Charge Trapping Memtransistor as Synaptic Device by Ti-Doped HfO
2
Yu Che Chou, Wan Hsuan Chung, Chien Wei Tsai, Chin Ya Yi,
Chao-Hsin Chien
智慧半導體奈米系統技術研究中心
研究成果
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引文 斯高帕斯(Scopus)
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2
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Keyphrases
Charge Trapping
100%
Ti-doped
100%
Doped HfO2
100%
Synaptic Device
100%
Memtransistors
100%
Charge Trapping Layer
66%
Transmission Electron Microscope
16%
Recognition Accuracy
16%
Pattern Recognition
16%
Capacitors
16%
HfO2
16%
Conductance
16%
Gate Stack
16%
Memory Window
16%
Charge Decay
16%
Electron Microscopy Images
16%
Storage Characteristics
16%
Atomic Layer Deposition
16%
Nonlinearity
16%
Trap Model
16%
X-ray Photoelectron Spectroscopy Analysis
16%
Energy Band Structure
16%
Cycle Ratio
16%
Germanium Channel
16%
Channel Charges
16%
Convolutional Neural Network Model
16%
Band Engineering
16%
Trap Distribution
16%
Decay Model
16%
Potentiation
16%
Image Ray
16%
Retention Model
16%
Multilayer Perceptron Neural Network (MLPNN)
16%
Ti Dopant
16%
Neural Network Accelerator
16%
Multi-layer Convolutional Neural Network
16%
NeuroSim
16%
Engineering
Synaptic Device
100%
Dopants
20%
Recognition Accuracy
20%
Pattern Recognition
20%
Ray Photoelectron Spectroscopy
20%
Band Structure
20%
Engineering
20%
Gate Stack
20%
Network Model
20%
Atomic Layer Deposition
20%
Thermal Model
20%
Energy Band
20%
Hardware Accelerator
20%
Charge Decay
20%
Nonlinearity
20%
Perceptron
20%
Convolutional Neural Network
20%
Material Science
Charge Trapping
100%
Doping (Additives)
10%
Pattern Recognition
10%
X-Ray Photoelectron Spectroscopy
10%
Electronic Band Structure
10%
Capacitor
10%
Germanium
10%