Improving Safe-Operating-Area of a 5-V n-Channel Large Array MOSFET in a 0.15-μ m BCD Process

Karuna Nidhi, Ming-Dou Ker*, Tingyou Lin, Jian Hsing Lee

*此作品的通信作者

研究成果: Article同行評審

7 引文 斯高帕斯(Scopus)

摘要

The safe-operating-area (SOA) of large array device (LAD) is one of the most important factors affecting the device reliability. In this paper, the improvement of the electrical-SOA (E-SOA) and the thermal-SOA (T-SOA) by using an optional implantation layer for 5-V n-channel large array MOSFET has been investigated in a 0.15-μm bipolar-CMOS-DMOS process. Experimental results showed that the secondary breakdown current (It2) is improved by 5 times, and a significant improvement is also observed in the E-SOA and the T-SOA boundary as compared to the original device. In addition, the impact of inserting additional layout pick-ups into themultiple-finger layout of large array MOSFET to the E-SOA, It2, and trigger voltage is also practically investigated in silicon for the LAD with a total width of 12 000 μm.

原文English
頁(從 - 到)2948-2956
頁數9
期刊IEEE Transactions on Electron Devices
65
發行號7
DOIs
出版狀態Published - 1 7月 2018

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