Improving Read Performance for LDPC-Based SSDs with Adaptive Bit Labeling on VthStates

Jia Xin Hou, Li Pin Chang

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

NAND-based Solid-State Disks (SSDs) have become the mainstream storage solution thanks to their high I/O performance and data persistency. Modern SSDs boost their storage capacity by increasing the flash cell-bit density, resulting in severe leakage-induced bit errors over time. Low-Density Parity-Check (LDPC) is a common error correcting code for flash memory, which features incremental decoding strength levels through adding extra voltage sensing levels. However, when bit error rate becomes high, LDPC decoding with strong correction will be very slow. In this study, we identify that the read latency is strongly correlated with the method of bit labeling on cell threshold-voltage states, and based on this finding we propose using adaptive bit labeling to optimize the SSD read latency. Specifically, our method employ 2-3-2 Gray Coding as the default mode, and frequently-read data will be switched to using the least-significant page and center-significant page with 1-2-4 Gray Coding for fast reading. Our experimental results show that our design greatly outperforms static bit labeling and a state-of-the-art method.

原文English
主出版物標題Proceedings - 2023 IEEE 29th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2023
發行者Institute of Electrical and Electronics Engineers Inc.
頁面77-84
頁數8
ISBN(電子)9798350337860
DOIs
出版狀態Published - 2023
事件29th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2023 - Niigata, 日本
持續時間: 30 8月 20231 9月 2023

出版系列

名字Proceedings - 2023 IEEE 29th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2023

Conference

Conference29th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2023
國家/地區日本
城市Niigata
期間30/08/231/09/23

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