Improvement on ESD robustness of lateral DMOS in high-voltage CMOS ICs by body current injection

Wen Yi Chen; Ming-Dou Ker; Yeh Ning Jou; Yeh Jen Huang; Geeng Lih Lin

doi:10.1109/ISCAS.2009.5117766

Improvement on ESD robustness of lateral DMOS in high-voltage CMOS ICs by body current injection

Wen Yi Chen^*, Ming-Dou Ker, Yeh Ning Jou, Yeh Jen Huang, Geeng Lih Lin

^*此作品的通信作者

研究成果: Conference contribution › 同行評審

12 引文斯高帕斯（Scopus）

摘要

With the waffle layout style, body-injected technique implemented by body current injection on n-channel lateral DMOS (nLDMOS) has been successfully verified in a 0.5-μm 16-V BCD process. The TLP measured results confirmed that the secondary breakdown current (It2) of waffle nLDMOS can be significantly increased by the body current injection with the corresponding trigger circuit design. The latchup immunity of power-rail ESD protection circuit can be further improved by the stacked configuration with multiple nLDMOS devices in HV ICs.

原文	English
主出版物標題	2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
頁面	385-388
頁數	4
DOIs	https://doi.org/10.1109/ISCAS.2009.5117766
出版狀態	Published - 26 10月 2009
事件	2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, 台灣持續時間: 24 5月 2009 → 27 5月 2009

出版系列

名字	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN（列印）	0271-4310

Conference

Conference	2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
國家/地區	台灣
城市	Taipei
期間	24/05/09 → 27/05/09

存取文件

10.1109/ISCAS.2009.5117766

其它文件與鏈接

Link to publication in Scopus

引用此

Chen, W. Y., Ker, M.-D., Jou, Y. N., Huang, Y. J., & Lin, G. L. (2009). Improvement on ESD robustness of lateral DMOS in high-voltage CMOS ICs by body current injection. 於 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 (頁 385-388). 文章 5117766 (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2009.5117766

@inproceedings{978e5fa6ed6f42c693c457957d31c861,

title = "Improvement on ESD robustness of lateral DMOS in high-voltage CMOS ICs by body current injection",

abstract = "With the waffle layout style, body-injected technique implemented by body current injection on n-channel lateral DMOS (nLDMOS) has been successfully verified in a 0.5-μm 16-V BCD process. The TLP measured results confirmed that the secondary breakdown current (It2) of waffle nLDMOS can be significantly increased by the body current injection with the corresponding trigger circuit design. The latchup immunity of power-rail ESD protection circuit can be further improved by the stacked configuration with multiple nLDMOS devices in HV ICs.",

author = "Chen, {Wen Yi} and Ming-Dou Ker and Jou, {Yeh Ning} and Huang, {Yeh Jen} and Lin, {Geeng Lih}",

year = "2009",

month = oct,

day = "26",

doi = "10.1109/ISCAS.2009.5117766",

language = "English",

isbn = "9781424438280",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

pages = "385--388",

booktitle = "2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009",

note = "2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 ; Conference date: 24-05-2009 Through 27-05-2009",

}

Chen, WY, Ker, M-D, Jou, YN, Huang, YJ & Lin, GL 2009, Improvement on ESD robustness of lateral DMOS in high-voltage CMOS ICs by body current injection. 於 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009., 5117766, Proceedings - IEEE International Symposium on Circuits and Systems, 頁 385-388, 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009, Taipei, 台灣, 24/05/09. https://doi.org/10.1109/ISCAS.2009.5117766

TY - GEN

T1 - Improvement on ESD robustness of lateral DMOS in high-voltage CMOS ICs by body current injection

AU - Chen, Wen Yi

AU - Ker, Ming-Dou

AU - Jou, Yeh Ning

AU - Huang, Yeh Jen

AU - Lin, Geeng Lih

PY - 2009/10/26

Y1 - 2009/10/26

N2 - With the waffle layout style, body-injected technique implemented by body current injection on n-channel lateral DMOS (nLDMOS) has been successfully verified in a 0.5-μm 16-V BCD process. The TLP measured results confirmed that the secondary breakdown current (It2) of waffle nLDMOS can be significantly increased by the body current injection with the corresponding trigger circuit design. The latchup immunity of power-rail ESD protection circuit can be further improved by the stacked configuration with multiple nLDMOS devices in HV ICs.

AB - With the waffle layout style, body-injected technique implemented by body current injection on n-channel lateral DMOS (nLDMOS) has been successfully verified in a 0.5-μm 16-V BCD process. The TLP measured results confirmed that the secondary breakdown current (It2) of waffle nLDMOS can be significantly increased by the body current injection with the corresponding trigger circuit design. The latchup immunity of power-rail ESD protection circuit can be further improved by the stacked configuration with multiple nLDMOS devices in HV ICs.

UR - http://www.scopus.com/inward/record.url?scp=70350144782&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2009.5117766

DO - 10.1109/ISCAS.2009.5117766

M3 - Conference contribution

AN - SCOPUS:70350144782

SN - 9781424438280

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - 385

EP - 388

BT - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009

T2 - 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009

Y2 - 24 May 2009 through 27 May 2009

ER -

Improvement on ESD robustness of lateral DMOS in high-voltage CMOS ICs by body current injection

摘要

出版系列

Conference

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