Improvement of CMOS-MEMS accelerometer using the symmetric layers stacking design

Ting Han Yen*, Ming Han Tsai, Chun I. Chang, Yu Chia Liu, Sheng Shian Li, Rongshun Chen, Jin-Chern Chiou, Weileun Fang

*此作品的通信作者

研究成果: Conference contribution同行評審

20 引文 斯高帕斯(Scopus)

摘要

This study presents a novel CMOS-MEMS capacitive type accelerometer design which consists of symmetric layers (4 metal and 3 dielectric layers) stacking to reduce the bending of suspended structures due to thin film residual stresses. Thus, the capacitance loss caused by the mismatch of sensing electrodes is reduced. Moreover, structures with symmetric layers stacking have less thermal deformation by temperature variation. A simple post-CMOS process including oxide wet-etching and dry XeF 2 etching is established to fabricate the device. Measurement shows maximum bending deformation of a suspended 390μmx430μm structure is only 1μm, and mismatch of fixed and movable sensing electrodes is reduced to 1μm. The bending curvature has only ∼2% change as temperature increased 80°C. The sensitivity of this accelerometer is 1.46mV/G (in comparison, the accelerometer with asymmetric layers stacking structure has sensitivity of 0.07mV/G), and the noise level is 0.35mG/√Hz.

原文English
主出版物標題IEEE Sensors 2011 Conference, SENSORS 2011
頁面145-148
頁數4
DOIs
出版狀態Published - 1 12月 2011
事件10th IEEE SENSORS Conference 2011, SENSORS 2011 - Limerick, Ireland
持續時間: 28 10月 201131 10月 2011

出版系列

名字Proceedings of IEEE Sensors

Conference

Conference10th IEEE SENSORS Conference 2011, SENSORS 2011
國家/地區Ireland
城市Limerick
期間28/10/1131/10/11

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