Improvement in RF performance of 40-nm InAs-channel based HEMTs using Pt gate sinking with two-step recess processes technology

Chien I. Kuo*, Heng-Tung Hsu, Chien Ying Wu, Edward Yi Chang, Yu Lin Chen, Wee Chin Lim

*此作品的通信作者

研究成果: Article同行評審

6 引文 斯高帕斯(Scopus)

摘要

Forty-nanometer InAs HEMT devices fabricated by two-step recess and Pt-buried gate were demonstrated for low-noise and low-power millimeter wave applications. The device exhibited a high transconductance of 1650 mS/mm at a drain voltage of 0.5 V. Improvement of the current-gain cutoff frequency from 395 GHz to 423 GHz was achieved with minimum noise figure below 2.5 dB up to 64 GHz at only 4.33mW DC power consumption level. Besides, the output conductance was decreased from 2400 mS/ mm to 325 mS/mm. These superior performances are attributed to mitigation of the short-channel effect through the proposed technology.

原文English
頁(從 - 到)2625-2628
頁數4
期刊Microelectronic Engineering
87
發行號12
DOIs
出版狀態Published - 1 1月 2010

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