@inproceedings{4ee04f0025e643dcbe7b4f72cdffa86f,
title = "Improved multi-level control of RRAM using pulse-train programming",
abstract = "Multi-level cell (MLC) capability in RRAM is attractive for reducing the cost per bit. Based on the filamentary switching mechanisms, we propose a pulse-train programming scheme to achieve reliable and uniform MLC controls without the need of any read-verification operation. By applying the novel scheme to a 3 bit/cell RRAM device, the uniformity of resistance distribution can be improved up to 80%.",
author = "Liang Zhao and Chen, {Hong Yu} and Wu, {Shih Chieh} and Zizhen Jiang and Shimeng Yu and Tuo-Hung Hou and Wong, {H. S.Philip} and Yoshio Nishi",
year = "2014",
month = apr,
day = "28",
doi = "10.1109/VLSI-TSA.2014.6839673",
language = "English",
isbn = "9781479922178",
series = "Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014",
publisher = "IEEE Computer Society",
pages = "1--2",
booktitle = "Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014",
address = "United States",
note = "null ; Conference date: 28-04-2014 Through 30-04-2014",
}