摘要
A description is given of a computationally efficient SPICE model for accurate prediction of the I-V and threshold voltage characteristics of small-geometry MOSFETs. The model based on an enhancement of the SPICE LEVEL3 MOS model and a novel approach of parameter extraction. The expressions achieved for the drain currents hold in the weak inversion, strong inversion, and saturation regimes of operation. The model supports the design of both short-channel and narrow-gate MOSFETs with any kind of implanted channel. Accuracy and benchmark tests show substantial improvements over the original LEVEL3 model.
原文 | English |
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期刊 | Proceedings of the Custom Integrated Circuits Conference |
出版狀態 | Published - 1 5月 1989 |
事件 | Proceedings of the IEEE 1989 Custom Integrated Circuits Conference - San Diego, CA, SA 持續時間: 15 5月 1989 → 18 5月 1989 |