摘要
The implantable stimulator for epileptic seizure suppression with loading impedance adaptability was proposed in this work. The stimulator consisted of the high voltage generator, output driver, adaptor, and switches, can constantly provide the required 40-μ A stimulus currents, as the loading impedance varied within 10 kΩ-300 kΩ. The performances of this design have been successfully verified in silicon chip fabricated by a 0.35-μm 3.3-V/24-V CMOS process. The power consumption of this work was only 1.1 mW-1.4 mW. The animal test results with the fabricated chip of proposed design have successfully verified in the Long-Evans rats with epileptic seizures.
原文 | English |
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文章編號 | 6231703 |
頁(從 - 到) | 196-203 |
頁數 | 8 |
期刊 | IEEE Transactions on Biomedical Circuits and Systems |
卷 | 7 |
發行號 | 2 |
DOIs | |
出版狀態 | Published - 1 1月 2013 |