Impacts of hole trapping on the NBTI degradation and recovery in PMOS devices

Keyphrases

• PMOS Device 100%
• Hole Trapping 100%
• Negative Bias Temperature Instability 100%
• P-channel 50%
• Dual Gate 50%
• Standard CMOS Technology 50%
• N-channel MOSFET 50%
• Paper Impact 50%
• Twin Well 50%

Material Science

• Negative-Bias Temperature Instability 100%
• Metal-Oxide-Semiconductor Field-Effect Transistor 50%

Engineering

• Negative-Bias Temperature Instability 100%
• Metal-Oxide-Semiconductor Field-Effect Transistor 50%