Impacts of gate structure on dynamic threshold SOI nMOSFETs

Wen Cheng Lo*, Sun Jay Chang, Chun Yen Chang, Tien-Sheng Chao

*此作品的通信作者

研究成果: Article同行評審

17 引文 斯高帕斯(Scopus)

摘要

The effects of different substrate-contact structures (T-gate and H-gate) dynamic threshold voltage silicon-on-insulator (SOI) nMOSFETs (DTMOS) have been investigated. It is found that H-gate structure devices have higher driving current than T-gate under DTMOS-mode operation. This is because H-gate SOI devices have larger body effect factor (γ), inducing a lager reduction of threshold voltage. Besides, it is found that drain-induced-barrier-lowering (DIBL) is dramatically reduced for both T-gate and H-gate structure devices when devices are operated under DTMOS-mode.

原文English
頁(從 - 到)497-499
頁數3
期刊IEEE Electron Device Letters
23
發行號8
DOIs
出版狀態Published - 1 八月 2002

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