Impact of structural parameter scaling on on-state voltage in 1200 v scaled IGBTs

Takuya Saraya*, Kazuo Itou, Toshihiko Takakura, Munetoshi Fukui, Shinichi Suzuki, Kiyoshi Takeuchi, Kuniyuki Kakushima, Takuya Hoshii, Kazuo Tsutsui, Hiroshi Iwai, Shin Ichi Nishizawa, Ichiro Omura, Toshiro Hiramoto

*此作品的通信作者

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

In this work, effects of structural parameter scaling on IGBT performance were systematically studied for both 1200 V non-scaled (k = 1) and scaled (k = 3) IGBTs. Relatively small area IGBT test devices with varied device parameters were fabricated on 3 inch wafers simultaneously with full size IGBTs. Mesa width, trench depth, p-base depth (MOS channel length) and gate oxide thickness were varied to clarify the contribution of each scaling parameter. P-collector dose was also varied for both k = 1 and k = 3 IGBTs to control the on-sate voltage. Clear on-state voltage improvement was verified in scaled IGBTs, in agreement with TCAD simulations. The origin of the performance improvement and the possibility of further improvement by scaling are discussed.

原文English
文章編號SGGD18
期刊Japanese Journal of Applied Physics
59
發行號SG
DOIs
出版狀態Published - 1 四月 2020

指紋

深入研究「Impact of structural parameter scaling on on-state voltage in 1200 v scaled IGBTs」主題。共同形成了獨特的指紋。

引用此