Impact of Residual Hardmask Wires on the Performance of Film-Profile-Engineered ZnO Thin-Film Transistors with Discrete Bottom Gates

Rong Jhe Lyu, Horng-Chih Lin, Tiao Yuan Huang

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

Root cause for the anomalous degradation in the ON-current of film-profile-engineered ZnO thin-film transistors with discrete bottom gates, a new scheme proposed in our previous work, is investigated. Our findings indicate that the deposited source/drain (S/D) metal contact pads are disconnected owing to two TiN wires hung over the S/D regions, which are unintentionally formed during the fabrication of devices. The disconnected S/D metal contacts cause an increase in the S/D series resistance, and thus, the ON-current is degraded. Several ways for addressing this issue are proposed in this letter, including the simple thinning of gate electrode. As the undesirable TiN wires are eliminated, the devices demonstrate enhanced field-effect mobility and uniformity in performance.

原文English
文章編號7124440
頁(從 - 到)796-798
頁數3
期刊IEEE Electron Device Letters
36
發行號8
DOIs
出版狀態Published - 1 8月 2015

指紋

深入研究「Impact of Residual Hardmask Wires on the Performance of Film-Profile-Engineered ZnO Thin-Film Transistors with Discrete Bottom Gates」主題。共同形成了獨特的指紋。

引用此