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Impact of random interface traps on asymmetric characteristic fluctuation of 16-nm-gate MOSFET devices
Yiming Li
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電信工程研究所
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引文 斯高帕斯（Scopus）
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深入研究「Impact of random interface traps on asymmetric characteristic fluctuation of 16-nm-gate MOSFET devices」主題。共同形成了獨特的指紋。
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Keyphrases
MOSFET
100%
Transistor Device
100%
Device Characteristics
100%
Gate Metal
100%
Interface Traps
100%
Asymmetric Feature
100%
Random Dopant Fluctuation
100%
Characteristic Fluctuation
100%
Random Interface Trap
100%
Trap Model
66%
Performance Improvement
33%
Physical Characteristics
33%
Electrical Characteristics
33%
Metal Gate
33%
Leakage Current
33%
65nm CMOS
33%
Device Fabrication
33%
CMOS Devices
33%
Device Technology
33%
Random Effects
33%
Nanometer Scale
33%
Silicon Devices
33%
Complementary Metal Oxide Semiconductor
33%
Metal-oxide-semiconductor Devices
33%
Technology Scaling
33%
Local Interaction
33%
Random Source
33%
Process Variation Effect
33%
Technology Performance
33%
High Silicon
33%
Device Variability
33%
Variant Effect
33%
Systematic Variation
33%
Induced Variability
33%
2D Interface
33%
Intrinsic Fluctuations
33%
Interface Trap Fluctuation
33%
Fabrication Challenges
33%
Computer Science
Effect Transistor
100%
Transistor Device
100%
Performance Improvement
50%
Process Variation
50%
Leakage Current
50%
Complementary Metal Oxide Semiconductor
50%
Engineering
Metal-Oxide-Semiconductor Field-Effect Transistor
100%
Interface Trap
100%
Dopants
42%
Random Effect
28%
Metal Gate
14%
Nanometre
14%
Performance Improvement
14%
One Dimensional
14%
Silicon Device
14%
Intrinsic Parameter
14%
Complementary Metal-Oxide-Semiconductor Device
14%
Reduce Leakage
14%
Process Variation
14%
Material Science
Doping (Additives)
100%
Metal-Oxide-Semiconductor Field-Effect Transistor
100%
Silicon
33%
Electrical Property
33%
Complementary Metal-Oxide-Semiconductor Device
33%
Silicon Device
33%
Physics
Field Effect Transistor
100%
Metal Oxide Semiconductor
100%
Semiconductor Device
33%