Impact of mosfet gate-oxide reliability on CMOS operational amplifiers in a 130-nm low-voltage CMOS process

Jung Sheng Chen*, Ming-Dou Ker

*此作品的通信作者

    研究成果: Conference contribution同行評審

    7 引文 斯高帕斯(Scopus)

    摘要

    The effects of the gate-oxide reliability of MOSFETs on operational amplifiers were investigated with the two-stage and folded-cascode structures in a 130-nm low-voltage CMOS process. The tested operating conditions include unity-gain buffer (close-loop configuration) and comparator (open-loop configuration) under different input frequencies and signals. After overstress, the small-signal parameters, such as small-signal gain, unity-gain frequency, and phase margin, were measured to verify the impact of gate-oxide reliability on circuit performances of the operational amplifier. The gate-oxide reliability can be improved by the stacked configuration in the operational amplifier with folded-cascode structure. A simple equivalent device model of gate-oxide reliability for CMOS devices in analog circuits was investigated and simulated.

    原文English
    主出版物標題2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual
    頁面423-430
    頁數8
    DOIs
    出版狀態Published - 2005
    事件2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual - San Jose, CA, United States
    持續時間: 17 4月 200521 4月 2005

    出版系列

    名字IEEE International Reliability Physics Symposium Proceedings
    ISSN(列印)1541-7026

    Conference

    Conference2005 IEEE International Reliability Physics Symposium Proceedings, 43rd Annual
    國家/地區United States
    城市San Jose, CA
    期間17/04/0521/04/05

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