Impact of High-Temperature Annealing on Interfacial Layers Grown by O2 Plasma on Si0.5Ge0.5 Substrates

Meng Chien Lee; Hung Ru Lin; Wei Li Lee; Nien Ju Chung; Guang Li Luo; Chao Hsin Chien

doi:10.1109/TED.2021.3138842

Impact of High-Temperature Annealing on Interfacial Layers Grown by O₂ Plasma on Si0.₅Ge_0.5 Substrates

Meng Chien Lee, Hung Ru Lin, Wei Li Lee, Nien Ju Chung, Guang Li Luo, Chao Hsin Chien^*

^*此作品的通信作者

研究成果: Article › 同行評審

1 引文斯高帕斯（Scopus）

摘要

This article demonstrates the influence of high-Temperature annealing on an interfacial layer (IL) grown by O2 plasma on Si0.5Ge0.5 substrates. The X-ray photoelectron spectroscopy results revealed that under an annealing temperature of 1000 °C, the concentration of germanium oxide in the IL decreased, and an IL with pure silicon oxide (100%) was produced. With a decrease in germanium oxide concentration, the SiGe metal oxide semiconductor capacitor exhibited an excellent interface trap density of 1.6\times10$ 12 cm-2eV-1 with negligible hysteresis. Furthermore, compared with 1000 °C IL annealing, 800 °C IL annealing was more suitable for preferential SiO2 growth without relaxation and dislocation in the SiGe layer, as observed using a transmission electron microscope.

原文	English
頁（從 - 到）	1265-1270
頁數	6
期刊	IEEE Transactions on Electron Devices
卷	69
發行號	3
DOIs	https://doi.org/10.1109/TED.2021.3138842
出版狀態	Published - 1 3月 2022

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10.1109/TED.2021.3138842

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@article{61a676c97cd143dcb3222a5ab2b33e3f,

title = "Impact of High-Temperature Annealing on Interfacial Layers Grown by O2 Plasma on Si0.5Ge0.5 Substrates",

abstract = "This article demonstrates the influence of high-Temperature annealing on an interfacial layer (IL) grown by O2 plasma on Si0.5Ge0.5 substrates. The X-ray photoelectron spectroscopy results revealed that under an annealing temperature of 1000 °C, the concentration of germanium oxide in the IL decreased, and an IL with pure silicon oxide (100%) was produced. With a decrease in germanium oxide concentration, the SiGe metal oxide semiconductor capacitor exhibited an excellent interface trap density of 1.6\times10$ 12 cm-2eV-1 with negligible hysteresis. Furthermore, compared with 1000 °C IL annealing, 800 °C IL annealing was more suitable for preferential SiO2 growth without relaxation and dislocation in the SiGe layer, as observed using a transmission electron microscope.",

keywords = "High-Temperature annealing, interface passivation, SiGe channel",

author = "Lee, {Meng Chien} and Lin, {Hung Ru} and Lee, {Wei Li} and Chung, {Nien Ju} and Luo, {Guang Li} and Chien, {Chao Hsin}",

note = "Publisher Copyright: {\textcopyright} 1963-2012 IEEE.",

year = "2022",

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day = "1",

doi = "10.1109/TED.2021.3138842",

language = "English",

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T1 - Impact of High-Temperature Annealing on Interfacial Layers Grown by O2 Plasma on Si0.5Ge0.5 Substrates

AU - Lee, Meng Chien

AU - Lin, Hung Ru

AU - Lee, Wei Li

AU - Chung, Nien Ju

AU - Luo, Guang Li

AU - Chien, Chao Hsin

PY - 2022/3/1

Y1 - 2022/3/1

N2 - This article demonstrates the influence of high-Temperature annealing on an interfacial layer (IL) grown by O2 plasma on Si0.5Ge0.5 substrates. The X-ray photoelectron spectroscopy results revealed that under an annealing temperature of 1000 °C, the concentration of germanium oxide in the IL decreased, and an IL with pure silicon oxide (100%) was produced. With a decrease in germanium oxide concentration, the SiGe metal oxide semiconductor capacitor exhibited an excellent interface trap density of 1.6\times10$ 12 cm-2eV-1 with negligible hysteresis. Furthermore, compared with 1000 °C IL annealing, 800 °C IL annealing was more suitable for preferential SiO2 growth without relaxation and dislocation in the SiGe layer, as observed using a transmission electron microscope.

AB - This article demonstrates the influence of high-Temperature annealing on an interfacial layer (IL) grown by O2 plasma on Si0.5Ge0.5 substrates. The X-ray photoelectron spectroscopy results revealed that under an annealing temperature of 1000 °C, the concentration of germanium oxide in the IL decreased, and an IL with pure silicon oxide (100%) was produced. With a decrease in germanium oxide concentration, the SiGe metal oxide semiconductor capacitor exhibited an excellent interface trap density of 1.6\times10$ 12 cm-2eV-1 with negligible hysteresis. Furthermore, compared with 1000 °C IL annealing, 800 °C IL annealing was more suitable for preferential SiO2 growth without relaxation and dislocation in the SiGe layer, as observed using a transmission electron microscope.

KW - High-Temperature annealing

KW - interface passivation

KW - SiGe channel

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U2 - 10.1109/TED.2021.3138842

DO - 10.1109/TED.2021.3138842

M3 - Article

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SN - 0018-9383

VL - 69

SP - 1265

EP - 1270

JO - Ieee Transactions On Electron Devices

JF - Ieee Transactions On Electron Devices

IS - 3

ER -

Impact of High-Temperature Annealing on Interfacial Layers Grown by O2 Plasma on Si0.5Ge0.5 Substrates

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Impact of High-Temperature Annealing on Interfacial Layers Grown by O₂ Plasma on Si0.₅Ge_0.5 Substrates